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A Hardware Architecture for Switch-Level Simulation

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2 Author(s)
W. J. Dally ; California Institute of Technology, Pasadena, CA, USA ; R. E. Bryant

The Mossim Simulation Engine (MSE) is a hardware accelerator for performing switch-level simulation of MOS VLSI circuits [1], [2]. Functional partitioning of the MOSSIM algorithm and specialized circuitry are used by the MSE to achieve a performance improvement of > 300 over a VAX 11/780 executing the MOSSIM II program. Several MSE processors can be connected in parallel to achieve additional speedup. A virtual processor mechanism allows the MSE to simulate large circuits with the size of the circuit limited only by the amount of backing store available to hold the circuit description.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:4 ,  Issue: 3 )