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An accurate two-dimensional self-consistent numerical model for MOS transistors which is able to predict avalanche behavior is presented. This model aims at a more principal understanding of the physical processes which arise from the avalanche effect and which eventually lead to breakdown. The system of the fundamental semiconductor equations with several generation/recombination mechanisms is solved. To improve the description of the ionization process, correction terms are introduced which account for the fact that the gate induced field does not cause ionization. Holes which are generated in the pinch-off region by impact ionization cause a bulk current; the voltage drop at the parasitic bulk resistance initiates an internal feedback mechanism. Thus a negative resistance branch of the drain current characteristic can arise. However, at high current levels, introduced by a high gate bias and/or a short channel, this snap-back effect is often counterbalanced by strong recombination. Snapback voltage can be estimated with this model.