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VLSI based analog power system emulator for fast contingency analysis

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3 Author(s)
Carullo, S.P. ; Carderock Div., Naval Surface Warfare Center, Philadelphia, PA, USA ; Olaleye, M. ; Nwankpa, C.O.

This paper is concerned with the development of a fast, programmable, and reconfigurable power system emulator using an analog/mixed-signal VLSI microchip. The proposed microchip is capable of emulating behaviors of large power system networks under various conditions with faster than real-time computation time that is independent of the size of the power system network. The proposed model focuses on static security analysis, where the main objective is to access the existing operating state of the system. If the state is found to be secure, contingency analysis is performed to evaluate system vulnerability and time necessary to obtain such results. This time is compared to traditional computational techniques to evaluate static security of a power system. This paper discusses the design methodology of the proposed microchip and describes a smaller scale prototype of the analog emulator that is currently being developed on printed circuit boards (PCBs).

Published in:

System Sciences, 2004. Proceedings of the 37th Annual Hawaii International Conference on

Date of Conference:

5-8 Jan. 2004

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