Cart (Loading....) | Create Account
Close category search window
 

Neural network model for testing stuck-at and delay faults in digital circuit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Pan Zhongliang ; Dept. of Phys., South China Normal Univ., Guangzhou, China

The automatic test pattern generation techniques using artificial neural networks are studied. First, an optimal neural network model of digital circuits is investigated. The network model can represent a logic circuit by the minimal number of neurons. It is shown that there exist optimal neural networks for arbitrary logic circuits. We can get the network parameters by solving a system of linear equations. Second, a new energy model for delay faults testing of digital circuits is presented, which is based on the optimal neural network models. Third, it is shown that the test generation approach using the optimal neural network model can reduce the search space, and has better computation efficiency if compared with the circuit test methods using Hopfield binary neural network.

Published in:

VLSI Design, 2004. Proceedings. 17th International Conference on

Date of Conference:

2004

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.