By Topic

Equivalent waveform propagation for static timing analysis

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Hashimoto, M. ; Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan ; Yamada, Y. ; Onodera, H.

This paper proposes a scheme that captures diverse input waveforms of CMOS gates for static timing analysis. Conventionally the latest arrival time and transition time are calculated from the timings when a transient waveform goes across pre-determined reference voltages. However, this method cannot accurately consider the impact of waveform shape on gate delay, when crosstalk-induced non-monotonic waveforms or inductance-dominant step-wise waveforms are injected. We propose a new timing analysis scheme called "equivalent waveform propagation". The proposed scheme calculates the equivalent waveform that makes the output waveform close to the actual waveform, and uses the equivalent waveform for timing calculation. The proposed scheme can cope with various waveforms affected by resistive shielding, crosstalk noise, wire inductance etc. In this paper, we devise a method to calculate equivalent waveform. The proposed calculation method is compatible with conventional methods in gate delay library and characterization, and hence our method is easy to be implemented with conventional static timing analysis tools.

Published in:

Computer Aided Design, 2003. ICCAD-2003. International Conference on

Date of Conference:

9-13 Nov. 2003