By Topic

Implementation of a recognition algorithm in a reconfigurable hardware using a FPGA circuit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Oltu, O. ; TEF Dept., Univ. "Politehnica" of Bucharest, Romania ; Milea, P.L. ; Chu Chen-Ya

The circuits presented in this paper are designed for students' use in the Radio Navigation and Traffic Control Systems (RNTCS) Laboratory. These circuits simulate the airborne part of the Distance Measuring Equipment (DME) to determine the aircraft position in the space. The digital part was implemented using a development system based on a FPGA circuit from Xilinx Company. This system was also designed in the RNTCS laboratory.

Published in:

Semiconductor Conference, 2003. CAS 2003. International  (Volume:2 )

Date of Conference:

28 Sept.-2 Oct. 2003