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SXGA pinned photodiode CMOS image sensor in 0.35 /spl mu/m technology

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9 Author(s)
Findlater, K. ; Imaging Div., STMicroelectronics, Edinburgh, UK ; Henderson, R. ; Baxter, D. ; Hurwitz, J.E.D.
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A 30 frames/s SXGA 5.6 /spl mu/m pinned photodiode pixel column parallel CMOS image sensor achieves 340 /spl mu/V noise floor and 40 pA/cm/sup 2/ dark current. Performance is limited by pixel 1/f noise, not by the ADC noise floor of 140 /spl mu/V. The column ADC memory employs a custom DRAM to save area. The sensor utilizes a 0.35 /spl mu/m 1P 3M CMOS process.

Published in:

Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International

Date of Conference:

13-13 Feb. 2003