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A 3 A 20 MHz BiCMOS/DMOS power operational amplifier: a structural design approach

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2 Author(s)
Ivanov, V. ; Texas Instruments Inc, Tucson, AZ, USA ; Baum, D.

Design of a power op-amp using a structural design methodology is presented. The BiCMOS/DMOS op-amp features rail-to-rail output, 3 A maximum output current, adjustable current limit without delay, a class AB input stage with a 50 V//spl mu/s slew rate, and 100 dB open-loop gain with a 2 /spl Omega/ load. It consumes 50 mA from a single 7-16 V supply.

Published in:

Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International

Date of Conference:

13-13 Feb. 2003