Improving simulated annealing placement by applying random and greedy mixed perturbations [IC layout]

This paper presents an improvement to placement using simulated annealing by applying a mix of greedy perturbations with the traditional random perturbations. The used greedy movements are based on a force-directed technique focused on wire length optimization. By analyzing cost curves related to running time, it is possible to see that our technique can converge faster than with any isolated technique. The experiment results show that our mixed perturbation schema outperforms the Timberwolf (C. Sechen et al., IEEE J. Solid-State Ccts., vol. SSC-20, 1995) random perturbation approach by 13.18% (wire length) and 21.36% (maximum wire congestion) in the best case.