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PACE: a parallel VLSI extractor on the Intel hypercube multiprocessor

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2 Author(s)
K. P. Belkhale ; Coord. Sci. Lab., Illinois Univ., Urbana, IL, USA ; P. Banerjee

Hypercube multiprocessors achieve a cost-effective and feasible approach to supercomputing by directly connecting a large number of low-cost processors with local memory, which cooperate on tasks by message-passing. An efficient parallel algorithm to speed up the VLSI circuit extraction task on a hypercube multiprocessor is proposed. The basic approach consists of partitioning of a circuit into smaller regions, assigning each region to a processor of the hypercube, and having the processors cooperate in performing the extraction procedures. The algorithm supports the use of different models for electrical parameter calculations of varying degrees of accuracy and computational complexity. The algorithm has been implemented in a program called PACE (parallel circuit extractor) on the Intel iPSC/D4-MX hypercube. Speedup results for the algorithm on many realistic VLSI circuits are presented.<>

Published in:

Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on

Date of Conference:

7-10 Nov. 1988