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A floating-gate-MOS-based low-power CDMA matched filter employing capacitance disconnection technique

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3 Author(s)
T. Yamasaki ; Dept. of Electron. Eng., Tokyo Univ., Japan ; T. Fukuda ; T. Shibata

Low-power and compact CDMA matched filters have been developed based on the floating-gate MOS technology. The low-power operation has been achieved by employing the single-step matching scheme and disconnecting the coupling-capacitors unnecessary for the matching operation. The 255-chip matched filter fabricated in a 0.35-/spl mu/m technology demonstrated 6 mW operation at 3 V power supply and the chip rate of 5 MS/S, while occupying the chip area of 1.0 mm/sup 2/.

Published in:

VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on

Date of Conference:

12-14 June 2003