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Bitline/plateline reference-level-precharge scheme for high-density chainFeRAM

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5 Author(s)
K. Oikawa ; Semicond. Co., Toshiba Corp., Yokohama, Japan ; D. Takashima ; S. Shiratake ; K. Hoya
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This paper proposes the new bitline/plateline operation scheme for 32 Mb chainFeRAM, which overcomes these two problems and also overcomes the problem of large array current due to the grounded bitline precharge scheme used for FeRAM.

Published in:

VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on

Date of Conference:

12-14 June 2003