A 1.8 V, 1 MS/s, 85 dB SNR 2+2 mash /spl Sigma//spl Delta/ modulator with /spl plusmn/0.9 V reference voltage

A 1.8 V, 1 MS/s, 85 dB SNR 2+2 mash /spl Sigma//spl Delta/ modulator with /spl plusmn/0.9 V reference voltage is realized by using the swing reduction structure. This structure limits the output swing of all the integrators within half the reference voltage. Thus, low voltage and high speed operation is possible with even high reference voltage without degrading the performance of the modulator. The circuit is fabricated in CMOS 0.35 /spl mu/m process with chip size of 2.5/spl times/2.5 mm/sup 2/.