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A scan BIST generation method using a Markov source and partial bit-fixing

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4 Author(s)
Wei Li ; Dept. of ECE, Iowa Univ., IA, USA ; Chaowen Yu ; S. M. Reddy ; I. Pomeranz

Recently, Markov sources were shown to be effective in designing pseudo-random test pattern generators with low area overhead for built-in self-test of scan designs. This paper presents a new test pattern generation scheme based on a Markov source and a partial bit-fixing technique. A new method is proposed for the computation of the state transition probabilities of the Markov source based on the statistics of a deterministic test set. This is enhanced by partial bit-fixing logic, which fixes a group of consecutive inputs to all-0 or all-1. Experimental results show that the proposed BIST scheme can achieve 100% fault coverage for large benchmark circuits with reduced hardware overhead and reduced pattern counts compared to the earlier method using Markov sources.

Published in:

Design Automation Conference, 2003. Proceedings

Date of Conference:

2-6 June 2003