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An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer

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3 Author(s)
Park, Chang Seo ; Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore ; Jin Cho, Byung ; Dim-Lee Kwong

We propose and demonstrate a novel approach for dual metal gate CMOS process integration through the use of a very thin aluminum nitride (AlN/sub x/) buffer layer between metal and gate oxide. This buffer layer prevents the gate oxide from being exposed to a metal etching process which potentially causes oxide thinning and damage. Subsequent annealing consumes the very thin AlN/sub x/ layer and converts it into a new metal alloy film by reacting with gate metals, resulting in no increase in EOT due to this buffer layer. The work function of the original gate metal is also modified as a result of its reaction with AlN/sub x/, making this approach extremely attractive for engineering the work function for dual metal gate CMOS applications.

Published in:

Electron Device Letters, IEEE  (Volume:24 ,  Issue: 5 )