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A 500-Mb/s soft-output Viterbi decoder

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4 Author(s)
Engling Yeo ; Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA ; S. A. Augsburger ; W. R. Davis ; B. Nikolic

Two eight-state 7-bit soft-output Viterbi decoders matched to an EPR4 channel and a rate-8/9 convolutional code are implemented in a 0.18-μm CMOS technology. The throughput of the decoders is increased through architectural transformation of the add-compare-select recursion, with a small area overhead. The survivor-path decoding logic of a conventional Viterbi decoder register exchange is adapted to detect the two most likely paths. The 4-mm2 chip has been verified to decode at 500 Mb/s with 1.8-V supply. These decoders can be used as constituent decoders for Turbo codes in high-performance applications requiring information rates that are very close to the Shannon limit.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:38 ,  Issue: 7 )