By Topic

Focal plane image segmentation using locally interconnected spiking pixel architecture

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
A. Bermak ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China ; M. Hofinger

In this paper we describe a focal-plane image segmentation architecture using an array of spiking pixels. We first describe the spiking pixel architecture which can be used in a locally interconnected network in order to perform image capture as well as image segmentation. Inspired from Biological visual systems and the integrate and fire oscillator, three different schemes are studied and their ability to perform image segmentation is compared. Simulation results demonstrate that heavy computational processing such as image segmentation can be realized with spiking pixel architecture organized in locally interconnected networks allowing them to be very suitable for VLSI implementation. Each pixel within the focal plane processing image sensor occupies an area of only 45 × 45μm2 using CMOS 0.25μm technology.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:5 )

Date of Conference:

25-28 May 2003