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This paper presents a modular way to synthesize on-chip interconnection architectures for very large scale integrated (VLSI) systems using generic components. The components use a standard interface and, therefore, the functionality of the system can be designed separately from the architecture. Examples from different ends of the performance and cost spectrum are presented. A bus is a simple interconnection that is still powerful enough for many applications. When larger transmission bandwidths are needed, also a crossbar can be considered. The choice of the utilized network should be based on the requirements of the application. The most important metrics helping the decision process are interconnection area and throughput. A bus network is found to be considerably smaller in area than a crossbar but the throughput of a crossbar is over two times higher in large data transfers. The throughput of the examined complex crossbar is mainly bounded by arbitration latencies.