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A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems

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5 Author(s)
D. Soudris ; Dept. of Electr. & Comput. Eng., Democritus Univ. of Thrace, Xanthi, Greece ; K. Sgouropoulos ; K. Tatas ; V. Pavlidis
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The goal of the research is twofold: first, the derivation of a design methodology for FIR filter implementation based on the Residue Number System (RNS), aiming at power, delay and hardware complexity reduction compared with conventional binary implementations. Second, a CAD tool development, which generates a synthesizable VHDL description of any RNS system design in an automatic way. This tool can derive RNS full adder-based DSP architectures consisting of FIR, scaling, converters, multiplication and accumulation units.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:5 )

Date of Conference:

25-28 May 2003