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A high-throughput pipelined architecture for blind adaptive equalization with minimum latency

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4 Author(s)
M. Mizuno ; Dept. of Commun. Electr. Eng., Nagano Japan Radio Co., Ltd., Japan ; K. Ueda ; J. Okello ; H. Ochi

We propose a pipelined architecture for an equalizer based on the multilevel modified constant modulus algorithm (MMCMA). We also provide the correction factor that mathematically converts the adaptive equalizer having the proposed architecture into an equivalent non-pipelined conventional MMCMA based equalizer. The proposed architecture uses modules with 6 filter coefficients, resulting in an overall latency of a single sampling period, along the main transmission line. The basic concepts of the proposed architecture is to implement the finite impulse response (FIR) filter and the algorithm portion of the equalizer, such that the critical path of all circuits has three complex multipliers and three adders.

Published in:

Signals, Systems and Computers, 2002. Conference Record of the Thirty-Sixth Asilomar Conference on  (Volume:2 )

Date of Conference:

3-6 Nov. 2002