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A design of real time general purpose signal processor architecture is proposed in this paper. The processor is based upon a binary tree structure utilizing multiprocessing, pipeline and distributed processing techniques. A host computer distributes the individual tasks to each processor to perform parallel operations. The residue number system is used for carry free arithmetic operations stored in RAM's and to achieve smaller packet size, eliminating serial transmission of packets as proposed in other data flow machines. The processor is programmable and capable or performing real time signal processing operations.