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A multi-channel microprogrammed FFT processor

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3 Author(s)
Balakrishnan, M. ; Indian Institute of Technology, New Delhi, India ; Rao, A. ; Bahl, R.

The complexity of implementing a multi-channel real-time FFT processor is examined with emphasis on memory specifications and processor performance, Design alternatives are considered and finally the design of an optimal processor is presented. The designed system is microprogrammed and optimised for pipeline processing. A reduction of a factor of four in the mass storage speed has been achieved at the expense of a small size high-speed memory.

Published in:

Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.  (Volume:7 )

Date of Conference:

May 1982