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Integrated floating point signal processor

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4 Author(s)
Bottcher, K. ; Heinrich-Hertz-Institut für Nachrichtentechnik, Berlin, W.-Germany ; Lacroix, A. ; Talmi, M. ; Wesseling, D.

Recent advances in technology of VLSI circuits enable economical hardware implementation of highly sophisticated signal processing algorithms. This provides the capability of realising a signal processor with uniform hardware for wide real-time applications. The adaption of the VLSI circuits to special application is possible by appropriate microprograms. The processor speed is determined by the arithmetic unit, particularly if floating point arithmetic is necessary. The processing speed can be increased by decreasing the operation time of the arithmetic unit and by the use of several adders, several multipliers, multiport memory and pipeline technique.

Published in:

Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.  (Volume:7 )

Date of Conference:

May 1982

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