Cart (Loading....) | Create Account
Close category search window
 

Effects of architecture implementation on DFT algorithm performance

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Mehalic, M. ; Test Wing, Elgin AFB, FL ; Rustan, P. ; Route, G.

Five major DFT algorithms were evaluated on seven different computers. The relative performances of these algorithms were related to the architecture of each computer by finding a relationship between the execution time and the instruction counts. The relative performance of these algorithms on other computers is predicted, based on the knowledge of the computer architecture. On certain implementations, data transfers are more important than floating-point additions and multiplications when comparing DFT algorithms. On the average, data transfers account for a greater percentage of the execution time than floating-point operations,

Published in:

Acoustics, Speech and Signal Processing, IEEE Transactions on  (Volume:33 ,  Issue: 3 )

Date of Publication:

Jun 1985

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.