By Topic

Data path tradeoffs using MABAL

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
K. Kucukcakar ; Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA ; A. C. Parker

A set of novel tradeoff experiments using MABAL, a module and bus allocation program, is described. MABAL uses a simple heuristic algorithm to concurrently perform functional unit allocation, register allocation, interconnect allocation, and module binding, while minimizing overall cost. MABAL was used to produce over 3000-RTL (register transfer level) designs from a specification which had been previously scheduled. Tradeoffs between buses and multiplexers and between data steering logic and functional logic were investigated. The results indicate that data path tradeoffs were sensitive to the characteristics of the module library used, and illustrate the difficulty of integrating module generations or logic synthesis, with high-level synthesis

Published in:

Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE

Date of Conference:

24-28 Jun 1990