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Semiconductor Chip Attachment with Small Bump Flip Chips

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1 Author(s)
Waite, G. ; Honeywell Information Systems, Billerica, Mass

It has been reported that the ratio of the diameter to the height of a reflow soldered flip-chip pad should be less than 2:l [1], [2]. This geometry permits a ductile material to accept the strain caused by differences in thermal expansion coefficients of silicon and alumina. However, to deposit sufficient material on a semiconductor chip to achieve this geometry has usually meant chip pad redesign and the resulting costly mask changes. This paper describes methods of depositing SUfficient material on a thick film substrate to permit use of chips with reduced bump volume. Details in the paper describe the volume calculations and artwork design for deposition of solder creme by screen printing. Selection and deposition of a dielectric glaze material to limit the area Of solder wetting on the substrate pads in also described. The test vehicle used in the study is a simple 2-bit counter utilizing 14MECL gates. It was fabricated in multilayer format for comparison of operating parameters between eutectic back bonded and solder reflow face bonded chips.

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Manufacturing Technology, IEEE Transactions on  (Volume:4 ,  Issue: 1 )