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Yield modeling in a custom IC manufacturing line

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1 Author(s)
P. Fang ; Digital Equipment Corp., Hudson, MA, USA

A methodology used to implement yield modeling in a custom integrated-circuit manufacturing facility is described. The sources for the inputs to the models are described. The component approach to yield modeling is explained, where component defect density (D0 ) information is used to build an overall yield prediction. A reverse model using a single D0 number is detailed. Verifications and selection criteria are given for model selection

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 1990. ASMC 90 Proceedings. IEEE/SEMI 1990

Date of Conference:

11-12 Sep 1990