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Two commonly used basic transistor blocking oscillator circuits are considered: 1) a common-emitter with collector-to-base transformer coupling, and 2) a common-base circuit with collector-to-emitter transformer ccupling. The pulse widths of the blocking oscillators are assumed to be dependent on the transistor and circuit parameters rather than external timing devices, i.e., delay lines. Also the transformers used in the circuits are assumed to operate linearly and exhibit no saturation effects. A review of the basic principles of operation is given and simplified equivalent circuits are included. A rise time equation is given in terms of the circuit parameters for the common-base blocking oscillator. The deterioration of the rise time with loading is shown in the equations. Pulse width equations, suitable for design purposes, are given for each type of circuit. A linear worst-case analysis shows the response of the common-base circuit to a step voltage trigger. This linear trigger analysis is an approximation due to the inherent nonlinearities associated with the transistor during the turn-on interval. However these worst-case results compare favorably with experimental rise time results. A trigger pulse of sufficient amplitude and a pulse duration of 0.05 sec simulates the voltage step function adequately since the circuit attains a regenerative mode during that period of time. The pulse width stability of the circuits is emphasized, and the common-base circuit is shown to have a better pulse width stability than the common-emitter circuit. A pulse width stability equation is obtained by considering partial derivatives of the pulse width equation.