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An 8-bit video ADC incorporating folding and interpolation techniques

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3 Author(s)

A flash-type analog-to-digital converter that operates without a sample-and-hold circuit and incorporates folding and interpolation techniques is presented. It achieves an excellent performance while dissipating only 300 mW from a single 5-V power supply. The folding and interpolation system and the corresponding block diagram are explained. Implementation of folding and interpolation circuitry and the design of the reference resistor are discussed in detail. Several advantages of the system are investigated. The effective resolution of the converter is given as a function of analog input frequency. An 8-bit resolution bandwidth of 8 MHz is achieved. Up to an analog input frequency of 5 MHz, every distortion component stays below -60 dB. The maximum sample rate is 55 MHz. The circuit occupies 6 mm/SUP 2/ of silicon area, bonding pads included. It is realized in a 2.5-μm bipolar process with an f/SUB T/ of 7.5 GHz.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:22 ,  Issue: 6 )