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Chip-to-chip driver and receiver circuits for a Josephson computer

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1 Author(s)

Requirements for drivers and receivers in a Josephson computer are described for transmission of logic signals over long lines and through package connectors. A driver with noise protection and rise time control for smooth propagation through inductive discontinuities has been designed. The receiver design incorporates polarity discrimination for rejection of signals stored on a long line. Drivers and receivers were fabricated, polarity discrimination was demonstrated, and delays were measured and found to agree with simulations. Nominal driver-receiver delay is 160 ps.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:17 ,  Issue: 4 )