Referenced Items are not available for this document.
Vertical injection logic (VIL), an improved structure of I/SUP 2/L, was applied to an analog watch IC with a 1.5-V supply voltage, which resulted in a CMOS equivalent current drain of 2 /spl mu/A and half the chip size of CMOS. The design consideration and experimental work that support the characteristics are described.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:12
,
Issue:
6
)
Date of Publication: Dec. 1977
- Page(s):
- 690 - 692
- ISSN :
- 0018-9200
- Digital Object Identifier :
- 10.1109/JSSC.1977.1050979
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 January 2003
- Issue Date :
- Dec. 1977
- Sponsored by :
- IEEE Solid-State Circuits Society
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