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Rise time of emitter-coupled logic circuits including the effects of collector-to-base capacitances

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1 Author(s)

Rise times of emitter-coupled logic circuits are computed, taking into account collector-to-base capacitances as well as gain-bandwidth products, ohmic base resistances, external stray capacitances, and the finite rise time of the input signal. Basic considerations are discussed, and explicit expressions and graphs are given for a wide range of circuit parameters.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:8 ,  Issue: 4 )