Cart (Loading....) | Create Account
Close category search window

Ferroelectric memory based secure dynamically programmable gate array

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Masui, S. ; Fujitsu Labs. Ltd., Tokyo, Japan ; Ninomiya, T. ; Oura, M. ; Yokozeki, W.
more authors

A nonvolatile ferroelectric SRAM based 8-context dynamically programmable gate array enables low-cost field programmable systems by the elimination of off-chip nonvolatile memories. Read and program procedures of the associated configuration memory are securely protected, so that unauthorized users cannot gain access to configuration data. The ferroelectric SRAM configuration memory features 2ns nondestructive read operations along with stable data recall. The logic block circuit is optimized to improve available logic gates for multi-context scheme.

Published in:

VLSI Circuits Digest of Technical Papers, 2002. Symposium on

Date of Conference:

13-15 June 2002

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.