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A 6.5 GHz FSK modulator suitable for low power wireless sensor network is presented. The modulator employs closed loop direct VCO modulation to achieve high data rate, variable loop bandwidth technique for fast start-up rates and Σ-Δ for reduced power consumption in the divider with fine resolution in channel selection. The synthesizer, implemented in 0.25 μm CMOS, achieves 20 μs start-up time with an effective data rate of 2.5 Mbps while consuming 22 mW.
Published in:
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Date of Conference: 2002
- Page(s):
- 182 - 185
- Print ISBN:
- 0-7803-7310-3
- INSPEC Accession Number:
- 7432216
- Digital Object Identifier :
- 10.1109/VLSIC.2002.1015079
- Product Type:
- Conference Publications
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