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A 6.5 GHz CMOS FSK modulator for wireless sensor applications

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2 Author(s)
SeongHwan Cho ; Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA ; A. P. Chandrakasan

A 6.5 GHz FSK modulator suitable for low power wireless sensor network is presented. The modulator employs closed loop direct VCO modulation to achieve high data rate, variable loop bandwidth technique for fast start-up rates and /spl Sigma/-/spl Delta/ for reduced power consumption in the divider with fine resolution in channel selection. The synthesizer, implemented in 0.25 /spl mu/m CMOS, achieves 20 /spl mu/s start-up time with an effective data rate of 2.5 Mbps while consuming 22 mW.

Published in:

VLSI Circuits Digest of Technical Papers, 2002. Symposium on

Date of Conference:

13-15 June 2002