By Topic

Programmable termination for CML I/O's in high speed CMOS transceivers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

9 Author(s)
S. Ramaswamy ; Texas Instrum. Inc., Dallas, TX, USA ; V. Gupta ; P. Landman ; B. Parthasarathy
more authors

This paper describes I/O circuits that can be used in high-speed transceivers to communicate with next generation and legacy devices. We describe the transmitter and receiver front-end circuits that are designed to operate with dual termination voltage supplies. The receiver characterization, ESD protection and system level power up issues related to gate-oxide and electro-migration reliability are discussed.

Published in:

VLSI Circuits Digest of Technical Papers, 2002. Symposium on

Date of Conference:

13-15 June 2002