Referenced Items are not available for this document.
A digitally programmable-gain amplifier (PGA) is realized using a 0.35 /spl mu/m CMOS technology. Constant bandwidth and high linearity are achieved by using a current-mode amplifier with resistor-network feedback. The PGA has a voltage gain varying from 0 dB to 19 dB with a bandwidth of 125 MHz. With 1 Vpp output, the third-order intermodulation (IM3) of the PGA is -86 dB at 10 MHz and -59 dB at 80 MHz. The distortion is also insensitive to the gain change. The circuit dissipates 21 mW from a 3.3 V supply.
Published in:
VLSI Circuits Digest of Technical Papers, 2002. Symposium on
Date of Conference: 13-15 June 2002
- Page(s):
- 32 - 35
- Print ISBN:
- 0-7803-7310-3
- INSPEC Accession Number:
- 7432184
- Conference Location :
- Honolulu, HI, USA
- Digital Object Identifier :
- 10.1109/VLSIC.2002.1015035
- Product Type:
- Conference Publications
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