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On-chip ESD protection circuits realized with novel diode structures, without the field-oxide boundary across the p/n junction, are proposed. A PMOS (NMOS) structure is especially inserted into the diode structure to form the PMOS-bounded (NMOS-bounded) diode, which is used to block the field oxide isolation across the p/n junction in the diode structure. Without the field oxide boundary across the p/n junction of the diode structure, the proposed PMOS-bounded and NMOS-bounded diodes can sustain much higher ESD stress, especially under the reverse-biased condition. Such PMOS-bounded and NMOS-bounded diodes are fully process-compatible with general CMOS processes without additional process modification or mask layers. The ESD protection circuits designed by such new diodes, with different junction parameters, have been successfully verified in a 0.35 μm CMOS process.