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A low-voltage sinc2 decimator implemented by a new circuit technique using floating-gate MOS transistors

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4 Author(s)
Hovin, Mats ; Dept. of Inf., Oslo Univ., Norway ; Wisland, D. ; Berg, Y. ; Lande, T.S.

In this paper we present a new circuit technique making standard CMOS digital circuits able to operate at a power supply voltages below 1 V. This technique is based on lowering the effective transistor threshold voltages by the use of floating-gates, where all the floating gate voltages on the chip are simultaneously programmed by the use of ultra-violet light. A sinc2 decimator is implemented in an AMS 0.6 μm process by this technique.

Published in:

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on  (Volume:5 )

Date of Conference:

2002