A low-voltage sinc² decimator implemented by a new circuit technique using floating-gate MOS transistors

In this paper we present a new circuit technique making standard CMOS digital circuits able to operate at a power supply voltages below 1 V. This technique is based on lowering the effective transistor threshold voltages by the use of floating-gates, where all the floating gate voltages on the chip are simultaneously programmed by the use of ultra-violet light. A sinc² decimator is implemented in an AMS 0.6 μm process by this technique.