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A 2.8V RWDM BTL Class-D power amplifier using an FGMOS comparator

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3 Author(s)
Nandhasri, K. ; Dept. of Electron. Eng., Mahanakorn Univ. of Technol., Bangkok, Thailand ; Ngarmnil, J. ; Moolpho, K.

This paper presents a design of an output stage based on Class-D amplifier techniques using rectangular wave delta modulation (RWDM) topology. This amplifier has a simple structure comprised only of a hysteresis comparator and output drivers. Thanks to the use of a multiple-input hysteresis comparator using floating-gate MOSFETs, the amplifier is capable of low voltage operation. On Alcatel 0.5 μm double poly CMOS process, this amplifier demonstrated up to 0.88W with 95% efficiency with a 2.8V power supply. This means implementation as a monolithic chip is possible, making this amplifier suitable for portable applications such as speaker driving circuits in mobile phones, hearing aids and other implantable medical devices.

Published in:

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on  (Volume:5 )

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