By Topic

A fast DSP circuit based on FHT

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Piazza, F. ; Dept. of Electron. & Autom., Ancona Univ., Italy ; Marchesi, M. ; Orlandi, G.

The discrete Hartley transform (DHT) is a real-valued transform closely related to the discrete Fourier transform (DFT) of a real-valued sequence. Several fast algorithms for the computation of the DHT (FHTs) have been proposed. A new cascade circuit for computing the DHT is presented in two versions, which implement, respectively, the radix-2 decimation-in-time and decimation-in-frequency FHT algorithms. The circuit makes use of CORDIC processors and allows an easy computation of the DFT, the amplitude and phase spectra, and the cyclic convolution and correlation of two sequences. Some architectures to perform such operations are also presented

Published in:

Circuits and Systems, 1989., IEEE International Symposium on

Date of Conference:

8-11 May 1989