By Topic

Dynamic deployment modeling tool for photolithography WIP management

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Williams, D. ; IBM Microelectron., Essex Junction, VT, USA ; Favero, D.

In semiconductor manufacturing, according to Marcoux et al. (1999) tool deployment has been identified as a key factor driving capacity loss and lower operational efficiency. In most cases, the losses are uncovered by analysis of Cycle Time data and investigation of specific tool performance. For the photolithography sector, this feedback approach often highlights problems after they may have already past or have been fixed. This paper will discuss a feed forward model for managing deployment of a large fleet of photolithography tools. This model predicts tool loading using existing tool planning parameters, actual and forecast wafer start data and extensive turn-around-time matrices. The model provides a portable tool with immediate readout of various loading scenarios. The deployment decision process makes use of these simulations. The model output comes in the form of graphs and tables that can summarize load by tool, tool groups, resist groups, technologies, and levels at various time slices. The output identifies where tool qualifications or additional resists may be needed, and deployment adjustments for WIP balance is warranted. These changes prevent operational efficiency loss and maintain cycle time performance.

Published in:

Advanced Semiconductor Manufacturing 2002 IEEE/SEMI Conference and Workshop

Date of Conference:

2002