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Competitive learning with floating-gate circuits

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3 Author(s)
D. Hsu ; Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA ; M. Figueroa ; C. Diorio

Competitive learning is a general technique for training clustering and classification networks. We have developed an 11-transistor silicon circuit, that we term an automaximizing bump circuit, that uses silicon physics to naturally implement a similarity computation, local adaptation, simultaneous adaptation and computation and nonvolatile storage. This circuit is an ideal building block for constructing competitive-learning networks. We illustrate the adaptive nature of the automaximizing bump in two ways. First, we demonstrate a silicon competitive-learning circuit that clusters one-dimensional (1-D) data. We then illustrate a general architecture based on the automaximizing bump circuit; we show the effectiveness of this architecture, via software simulation, on a general clustering task. We corroborate our analysis with experimental data from circuits fabricated in a 0.35-μm CMOS process

Published in:

IEEE Transactions on Neural Networks  (Volume:13 ,  Issue: 3 )