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Approximate simulation of distributed-memory multithreaded multiprocessors

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1 Author(s)
Zuberek, W.M. ; Dept. of Comput. Sci., Memorial Univ. of Newfoundland, St. John''s, Nfld., Canada

The performance of modern computer systems is increasingly limited by long latencies of accesses to their memory systems. Instruction-level multithreading is a technique to tolerate long latencies of memory accesses by switching from one instruction thread to another. The paper shows that the simulation-based performance evaluation of distributed-memory multithreaded multiprocessor systems can be significantly simplified by using approximate models, composed of only a few processors, but with some parameters adjusted to represent the behavior of the original system.

Published in:

Simulation Symposium, 2002. Proceedings. 35th Annual

Date of Conference:

14-18 April 2002