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A planarized shallow-trench-isolation for GaAs devices fabrication using liquid phase chemical enhanced oxidation process

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5 Author(s)
Wu, Jau-Yi ; Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan ; Wang, Hwei-Heng ; Po-Wen Sze ; Yeong-Her Wang
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A new planarized trench isolation technique for GaAs devices fabrication by a liquid phase chemical-enhanced oxidation (LPCEO) method is proposed. The LPCEO-trench-isolation technique can be operated at low temperature with a simple and low-cost process. As compared with conventional mesa isolation, the LPCEO-trench-isolation can provide better planarity and isolation properties. Finally, GaAs MOSFETs fabricated with LPCEO-trench-isolation and selective oxidized gate both by the LPCEO method are demonstrated.

Published in:

Electron Device Letters, IEEE  (Volume:23 ,  Issue: 5 )

Date of Publication:

May 2002

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