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An EMC-compliant design method for high-density integrated circuits

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2 Author(s)
Ramdani, M. ; Ecole Superieure d''Electronique de l''Ouest, Angers, France ; Levanv, J.-L.

This paper deals with an innovative method of EMC-compliant design. This technique helps to optimize emission level as soon as in the design phase, and provides noise-related solutions which will be evaluated and integrated into the silicon. This method allows to model the activity of thousand-gate circuits thanks to only two current generators which represent supply current consumption in the VDD and the VSS rails. This allows EMC evaluation and optimization (conducted noise) for a packaged integrated circuit within its electrical environment

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Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings

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