To reduce the long circuit-level simulation time of ΔΣ modulators, a variety of techniques and tools exist that use high-level models for discrete-time (DT) ΔΣ modulators. There is, however, no rigorous methodology implemented in a tool for the continuous-time (CT) counterpart. Therefore, we have developed a methodology for the high-level simulation of CT ΔE modulators and implemented this method in a user-friendly tool. Key features are the simulation speed, accuracy and extensibility. Nonidealities such as finite gain, finite GBW, output impedance and also the important effect of jitter are modelled. Finally, experiments were carried out using the tool, exploring important design trade-offs
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Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Date of Conference: 2002