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Low-power and high-speed V VLSI design with low supply voltage through cooperation between levels

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1 Author(s)
Sakurai, T. ; Inst. of Ind. Sci., Univ. of Tokyo, Japan

In this paper, methods to achieve low-power and high-speed VLSI's are described with the emphasis on cooperation between levels. To suppress the leakage current in a standby mode, Boosted Gate MOS (BGMOS) is effective, which is based on cooperation between technology level and circuit level. To reduce the power in an active mode, VDD-hopping and VTH-hopping are promising, which are cooperative approaches between circuit and software. The power consumed in an interconnect system is another issue in low-voltage deep-submicron designs. A cooperative approach between VLSI and assembly to the interconnect power problem is also discussed.

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Quality Electronic Design, 2002. Proceedings. International Symposium on

Date of Conference: