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A new approach of dead-time compensation for PWM voltage inverters

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1 Author(s)
Jong-Lick Lin ; Dept. of Eng. Sci., Nat. Cheng Kung Univ., Tainan, Taiwan

It is essential to insert a switching delay time in sinusoidal pulsewidth modulation (PWM) voltage-fed inverters to prevent a short circuit in the dc link. This causes the well known dead-time effect which is detrimental to the performance of the output voltage. Many compensation schemes were proposed to overcome the drawbacks. In this paper, based on a systematic approach, a new approach to accurately compensate the dead-time effect is presented. The system analysis and compensation synthesis are straightforward without averaging the output voltage deviation. The model of the PWM voltage inverter with a time delay circuit leads us to a systematic approach of compensation. The simulation responses and experimental results show the validity of the analysis and verify the effectiveness of the proposed compensation method

Published in:

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on  (Volume:49 ,  Issue: 4 )

Date of Publication:

Apr 2002

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