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Power estimation methods for analog circuits for architectural exploration of integrated systems

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2 Author(s)
E. Lauwers ; Katholieke Univ., Leuven, Belgium ; G. Gielen

This paper describes methods for analog-power estimation and applies them practically to two different classes of analog circuits. Such power estimators, which return a power estimate given only a block's specification values without knowing its detailed circuit implementation, are valuable components for architectural exploration tools and hence interesting for high-level system designers. As an illustration, two estimators are presented: one for high-speed analog-to-digital converters (ADCs) and one for analog-continuous time filters. The ADC power estimator is a technology scalable closed formula and yields first-order results within an accuracy factor of about 2.2 for the whole class of high-speed Nyquist-rate ADCs. The filter-power estimator is of a more complex nature. It uses a crude filter synthesis, in combination with operational transconductor amplifier behavioral models to generate accurate results as well, but restricted to certain filter implementations.

Published in:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems  (Volume:10 ,  Issue: 2 )