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Explicit expression and simultaneous optimization of placement and routing for analog IC layouts

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4 Author(s)
Y. Kubo ; Dept. of Inf. & Media Sci., Kitakyushu Univ., Japan ; S. Nakatake ; Y. Kajitani ; M. Kawakita

Our target is automation of analog circuit layout, which is a bottleneck in mixed-signal design. We formulate the layout explicitly considering manufacturing process, and propose an algorithm that consists of simultaneous expression and optimization of placement and routing. The key is that all the cells and wires are represented by rectangles. The algorithm is combined into a commercial tool, and the performance convinced us that the utilization shortens the design time

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Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.

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